The present invention relates to a semiconductor memory device; and, more particularly, to a decoder circuit for use in the semiconductor memory device.
As well-known in the art, a semiconductor memory device is a semiconductor device for storing data and outputting the stored data. The semiconductor memory device includes a data storage area in which a plurality of unit cells are disposed for storing data and an input/output area in which a data input/output circuit for outputting the data stored in the data storage area or delivering data from outside to the data storage area is arranged.
The input/output area is provided with a data input circuit, a data output circuit, an address input circuit, and a command input circuit. The data input circuit serves to convey data provided from outside to the data storage area in response to a write command, and the data output circuit is for outputting data from the data storage area to the outside in response to a read command. Further, the address input circuit is to accept an address to designate a position of data to be stored or outputted and output it in response to the write command and the read command. And, the command input circuit functions to control other circuits including the above circuits by analyzing the read command or write command, and the like applied thereto.
Meanwhile, the data storage area is provided with a plurality of banks, each having a plurality of unit cells corresponding to their respective addresses. In general, one bank has a multiplicity of cell blocks into which plural unit cells are grouped. In addition, the data storage area is provided with a decoding circuit which receives and decodes an address from the input/output area and selects a unit cell corresponding to the received address among the unit cells prepared in each bank.
For efficient decoding of a received address, the semiconductor memory device includes a pre-decoder and a main decoder. When an address is inputted, the pre-decoder decodes the inputted address once and thereafter the main decoder decodes an address signal decoded by the pre-decoder once again. The pre-decoder and main decoder are provided in each bank of the semiconductor memory device. Because the semiconductor memory device is provided with these decoders in each bank, it can perform a data access operation for each bank.
In the data access procedure of the semiconductor memory device, an address is first inputted. Then, a bank corresponding to the inputted address is selected and the inputted address is decoded by a pre-decoder prepared in the selected bank. Next, an output of the pre-decoder is decoded once more by a main decoder and data corresponding to the decoded result is accessed. Once the data has been accessed, a precharge operation is carried out. The precharge operation refers to an operation in which various circuits including the main decoder and the pre-decoder are reset to a precharge value for the next data access.
With the advance of technology, it is required that the semiconductor memory device consumes less power and accesses data more rapidly. There has been too much current consumption during the operation of the main decoder and the pre-decoder for data access. Therefore, a need has existed for a development of a scheme for reducing the current consumption.